Abhinav Kranti

According to our database1, Abhinav Kranti authored at least 11 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Optimization of Multiple Physical Phenomena through a Universal Metric in Junctionless Transistors.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018
Hysteresis Free sub-60 mV/dec Subthreshold Swing in Junctionless MOSFETs.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Emerging FETs for Low Power and High Speed Embedded Dynamic Random Access Memory.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2017
Suppressing Single Transistor Latch Effect in Energy Efficient Steep Switching Junctionless MOSFETs.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

Extraction and Analysis of Mobility in Double Gate Junctionless Transistor.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

2015
Back-gate effects and detailed characterization of junctionless transistor.
Proceedings of the 45th European Solid State Device Research Conference, 2015

2014
Performance Optimization and Parameter Sensitivity Analysis of Ultra Low Power Junctionless MOSFETs.
Proceedings of the 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, 2014

Volume accumulated double gate junctionless MOSFETs for low power logic technology applications.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2011
Investigation of high-performance sub-50 nm junctionless nanowire transistors.
Microelectron. Reliab., 2011

2010
Nonclassical Channel Design in MOSFETs for Improving OTA Gain-Bandwidth Trade-Off.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009
Improving Operational transconductance Amplifier (OTA) gain-bandwidth tradeoff using gate-underlap MOSFETs.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009


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