Abhinav Kranti

According to our database, Abhinav Kranti authored at least 12 papers between 2009 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Pragmatic Evaluation of Process Corners in ULP Subthreshold Circuits With Quantum Confinement Effects in Junctionless Nanowire Transistor.

Nivedita Rai, Sandeep Semwal, Rohit Kumar Nirala, Abhinav Kranti

IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

2019

Optimization of Multiple Physical Phenomena through a Universal Metric in Junctionless Transistors.

Manish Gupta, Abhinav Kranti

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018

Hysteresis Free sub-60 mV/dec Subthreshold Swing in Junctionless MOSFETs.

Manish Gupta, Abhinav Kranti

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Emerging FETs for Low Power and High Speed Embedded Dynamic Random Access Memory.

Md. Hasan Raza Ansari, Nupur Navlakha, Jyi-Tsong Lin, Abhinav Kranti

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2017

Suppressing Single Transistor Latch Effect in Energy Efficient Steep Switching Junctionless MOSFETs.

Manish Gupta, Abhinav Kranti

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

Extraction and Analysis of Mobility in Double Gate Junctionless Transistor.

Y. V. Bhuvaneshwari, Abhinav Kranti

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

2015

Back-gate effects and detailed characterization of junctionless transistor.

Mukta Singh Parihar, Fan Yu Liu, Carlos Navarro, Sylvain Barraud, Maryline Bawedin, Irina Ionica, Abhinav Kranti, Sorin Cristoloveanu

Proceedings of the 45th European Solid State Device Research Conference, 2015

2014

Performance Optimization and Parameter Sensitivity Analysis of Ultra Low Power Junctionless MOSFETs.

Mukta Singh Parihar, Abhinav Kranti

Proceedings of the 2014 27th International Conference on VLSI Design, 2014

Volume accumulated double gate junctionless MOSFETs for low power logic technology applications.

Mukta Singh Parihar, Abhinav Kranti

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2011

Investigation of high-performance sub-50 nm junctionless nanowire transistors.

Ran Yan, Abhinav Kranti, Isabelle Ferain, Chi-Woo Lee, Ran Yu, Nima Dehdashti, Pedram Razavi, Jean-Pierre Colinge

Microelectron. Reliab., 2011

2010

Nonclassical Channel Design in MOSFETs for Improving OTA Gain-Bandwidth Trade-Off.

Abhinav Kranti, G. Alastair Armstrong

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009

Improving Operational transconductance Amplifier (OTA) gain-bandwidth tradeoff using gate-underlap MOSFETs.

Abhinav Kranti, G. Alastair Armstrong

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009