Olujide A. Adeniran

According to our database, Olujide A. Adeniran authored at least 8 papers between 2004 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

Constant-Resistance CMOS Input Sampling Switch for GSM/WCDMA High Dynamic Range Delta Sigma Modulators.

Olujide A. Adeniran, Andreas Demosthenous

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

2007

A 14-mW, 153.6-MHz clock-rate Δ∑ modulator for WCDMA with 77-dB SFDR using constant resistance CMOS input sampling switch.

Olujide A. Adeniran, Andreas Demosthenous

Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006

An Ultra-Energy-Efficient Wide-Bandwidth Video Pipeline ADC Using Optimized Architectural Partitioning.

Olujide A. Adeniran, Andreas Demosthenous

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A 19.5mW 1.5V 10-bit pipeline ADC for DVB-H systems in 0.35µm CMOS.

Olujide A. Adeniran, Andreas Demosthenous

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Segmented Analog Calibration Scheme for Low-Power Multi-Bit Pipeline ADCs.

Olujide A. Adeniran, Andreas Demosthenous

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

A 92dB 560MHz 1.5V 0.35 μm CMOS operational transconductance amplifier.

Olujide A. Adeniran, Andreas Demosthenous

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

Optimization of bit-per-stage for low-voltage low-power CMOS pipeline ADCs.

Olujide A. Adeniran, Andreas Demosthenous

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2004

A CMOS low-power ADC for DVB-T and DVB-H systems.

Olujide A. Adeniran, Andreas Demosthenous, Chris Clifton, Sam Atungsiri, Randeep Soin

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004