Ondrej Subrt

According to our database, Ondrej Subrt authored at least 11 papers between 2003 and 2021.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2021

Dynamic Programming and Greedy Heuristic in the Load Balancing Problem for the iFDAQ of the COMPASS Experiment at CERN.

Ondrej Subrt, Martin Bodlák, Vladimír Jarý, Antonín Kveton, Josef Nový, Miroslav Virius, Martin Zemko

Proceedings of the ISEEIE 2021: International Symposium on Electrical, Electronics and Information Engineering, Seoul Republic of Korea, February 19, 2021

2020

Reinforcement Learning in the Load Balancing Problem for the iFDAQ of the COMPASS Experiment at CERN.

Ondrej Subrt, Martin Bodlák, Matous Jandek, Vladimír Jarý, Antonín Kveton, Josef Nový, Miroslav Virius, Martin Zemko

Proceedings of the 12th International Conference on Agents and Artificial Intelligence, 2020

2019

Modified Differential Evolution in the Load Balancing Problem for the iFDAQ of the COMPASS Experiment at CERN.

Ondrej Subrt, Martin Bodlák, Matous Jandek, Vladimír Jarý, Antonín Kveton, Josef Nový, Jan Tomsa, Miroslav Virius

Proceedings of the 11th International Joint Conference on Computational Intelligence, 2019

2018

SC Filter Optimization Performance by Hybrid Simplex Algorithm.

Jiri Nahlik, Jirí Hospodka, Ondrej Subrt

Proceedings of the 15th International Conference on Synthesis, 2018

2016

The Algorithmizable Modeling of the Object-Oriented Data Model in Craft.CASE.

Ondrej Subrt, Vojtech Merunka

Proceedings of the Enterprise and Organizational Modeling and Simulation, 2016

2010

Versatile sub-bandgap reference IP core.

Tomás Urban, Ondrej Subrt, Pravoslav Martínek

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009

Experience in Virtual Testing of RSD cyclic A/D converters.

Miloslav Kubar, Ondrej Subrt, Pravoslav Martínek, Jiri Jakovenko

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008

Virtual Testing Environment for A/D Converters in Verilog-A and Maple Platform.

Ondrej Subrt, Petr Struhovský, Pravoslav Martínek, Jirí Hospodka

Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007

Developing Virtual ADC Testing Environment in MAPLE.

Petr Struhovský, Ondrej Subrt, Jirí Hospodka, Pravoslav Martínek

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006

A Novel Design Evaluation Concept Applied to Switched-Current Algorithmic A/D Converters.

Ondrej Subrt, Pravoslav Martínek

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2003

A versatile structure of S31-GGA-casc switched-current memory cell with complex suppression of memorizing errors.

Ondrej Subrt

Proceedings of the ESSCIRC 2003, 2003