P. S. T. N. Srinivas

Orcid: 0000-0001-5559-7623

According to our database¹, P. S. T. N. Srinivas authored at least 4 papers between 2019 and 2024.

Collaborative distances:

Timeline

Book In proceedings Article PhD thesis Dataset Other

2024

Logic-in-memory application of silicon nanotube-based FBFET with core-source architecture.

[DOI]

Microelectron. J., 2024

2023

Impact of self-heating on thermal noise in In<sub>1-x</sub>Ga<sub>x</sub>As GAA MOSFETs.

[DOI]

Microelectron. J., 2023

Impact of Process-Induced Inclined Sidewalls On Small Signal Parameters of Silicon Nanowire GAA MOSFET.

[DOI]

Proceedings of the IEEE Region 10 Conference, 2023

2019

Analytical Modeling of Subthreshold Current and Subthreshold Swing of Schottky-Barrier Source/Drain Double Gate-All-Around (DGAA) MOSFETs.

[DOI]

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019