P. Sudhanya

According to our database¹, P. Sudhanya authored at least 3 papers between 2021 and 2025.

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2025

Analysis of FPGA Architecture with Hybrid Logic Blocks Based on ULG and LUT.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., January, 2025

2022

Approximate Multipliers Design Using Approximate Adders for Image Processing Applications.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2022

2021

Wire-Length and Run-Time Optimization in FPGA Placement Using Hybrid Iterative Algorithms.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2021