Palash Das

Orcid: 0000-0002-1979-0298

According to our database1, Palash Das authored at least 12 papers between 2002 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
edAttack: Hardware Trojan Attack on On-Chip Packet Compression.
IEEE Des. Test, December, 2023

ALAMNI: Adaptive LookAside Memory Based Near-Memory Inference Engine for Eliminating Multiplications in Real-Time.
IEEE Trans. Computers, March, 2023

2022
ZaLoBI: Zero avoiding Load Balanced Inference accelerator.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Hydra: A near hybrid memory accelerator for CNN inference.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
nZESPA: A Near-3D-Memory Zero Skipping Parallel Accelerator for CNNs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

CLU: A Near-Memory Accelerator Exploiting the Parallelism in Convolutional Neural Networks.
ACM J. Emerg. Technol. Comput. Syst., 2021

2020
Dimming Hybrid Caches to Assist in Temperature Control of Chip MultiProcessors.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

2018
Towards Near Data Processing of Convolutional Neural Networks.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Towards Near-Data Processing of Compare Operations in 3D-Stacked Memory.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2014
A comprehensive fault diagnosis technique for reversible logic circuits.
Comput. Electr. Eng., 2014

Signature analysis for synthesis of reversible circuit.
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014

2002
Advances in excimer laser technology for sub-0.25-μm lithography.
Proc. IEEE, 2002


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