Angsuman Sarkar

According to our database, Angsuman Sarkar authored at least 14 papers between 2012 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Introduction to the special section on State-of-the-art Micro-Nano devices and systems.

Angsuman Sarkar, Chandan Kumar Sarkar, Arezki Benfdila

Comput. Electr. Eng., 2022

Impact of Interface Trap Charges on the Performances of Junctionless MOSFET in Sub-Threshold Regime.

Tanushree Ganguli, Manash Chanda, Angsuman Sarkar

Comput. Electr. Eng., 2022

Analytical modeling of dielectrically modulated broken-gate tunnel FET biosensor considering partial hybridization effect.

Joy Chowdhury, Angsuman Sarkar, Kamalakanta Mahapatra, J. K. Das

Comput. Electr. Eng., 2022

Performance enhancement of normally off InAlN/AlN/GaN HEMT using aluminium gallium nitride back barrier.

Nisarga Chand, Sarosij Adak, Sanjit Kumar Swain, Sudhansu Mohan Biswal, Angsuman Sarkar

Comput. Electr. Eng., 2022

2021

A CAD approach for power supply noise aware floorplan in SoC.

Partha Mitra, Jaydeb Bhaumik, Angsuman Sarkar

Int. J. High Perform. Syst. Archit., 2021

Decoupling Capacitor Estimation and Allocation using Optimization Techniques for Power Supply Noise Reduction in System-on-Chip.

Partha Mitra, Jaydeb Bhaumik, Angsuman Sarkar

J. Electron. Test., 2021

2020

Soft Computing Techniques Based CAD Approach for Power Supply Noise Reduction in System-on-Chip.

Partha Mitra, Angsuman Sarkar

J. Electron. Test., 2020

2019

Novel Threshold Voltage Model Incorporating Band-to-Band Tunneling in Heterostructure p-MOSFET.

Joy Chowdhury, Arpan Deyasi, Angsuman Sarkar, Kamalakanta Mahapatra

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

2018

Blueshift of Optical Signal in PhC Based Butterworth Filter Due to Joule Heat Dissipation.

Arpan Deyasi, Angsuman Sarkar

Proceedings of the Computational Intelligence, Communications, and Business Analytics, 2018

2017

Radio frequency/analog and linearity performance of a junctionless double gate metal-oxide-semiconductor field-effect transistor.

Biswajit Baral, Sudhansu Mohan Biswal, Debashis De, Angsuman Sarkar

Simul., 2017

Spacer engineering for performance enhancement of junctionless accumulation-mode bulk FinFETs.

Kalyan Biswas, Angsuman Sarkar, Chandan Kumar Sarkar

IET Circuits Devices Syst., 2017

2016

Impact of Fin Width Scaling on RF/Analog Performance of Junctionless Accumulation-Mode Bulk FinFET.

Kalyan Biswas, Angsuman Sarkar, Chandan Kumar Sarkar

ACM J. Emerg. Technol. Comput. Syst., 2016

2012

Effect of gate engineering in double-gate MOSFETs for analog/RF applications.

Angsuman Sarkar, Aloke Kumar Das, Swapnadip De, Chandan Kumar Sarkar

Microelectron. J., 2012

1/f noise and analogue performance study of short-channel cylindrical surrounding gate MOSFET using a new subthreshold analytical pseudo-two-dimensional model.

Angsuman Sarkar, Swapnadip De, Anup Dey, Chandan Kumar Sarkar

IET Circuits Devices Syst., 2012