Parham Hosseinzadeh Namin

Orcid: 0000-0001-5960-3584

According to our database1, Parham Hosseinzadeh Namin authored at least 5 papers between 2015 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2018
Efficient VLSI Implementation of a Sequential Finite Field Multiplier Using Reordered Normal Basis in Domino Logic.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2017
Digit-Level Serial-In Parallel-Out Multiplier Using Redundant Representation for a Class of Finite Fields.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Fully Serial-In Parallel-Out Digit-Level Finite Field Multiplier in 𝔽<sub>2<sup>m</sup></sub> Using Redundant Representation.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A secure test solution for sensor nodes containing crypto-cores.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2015
Low power design of a word-level finite field multiplier using Reordered Normal Basis.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015


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