# Paritosh K. Pandya

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## Bibliography

2018

Büchi-Kamp Theorems for 1-clock ATA.

CoRR, 2018

2017

DCSYNTH: Guided Reactive Synthesis with Soft Requirements for Robust Controller and Shield Synthesis.

CoRR, 2017

Formalizing Timing Diagram Requirements in Discrete Duration Calulus.

CoRR, 2017

Deterministic Temporal Logics and Interval Constraints.

Proceedings of the Ninth Workshop on Methods for Modalities, 2017

Making Metric Temporal Logic Rational.

CoRR, 2017

Formalizing Timing Diagram Requirements in Discrete Duration Calculus.

Proceedings of the Software Engineering and Formal Methods - 15th International Conference, 2017

Making Metric Temporal Logic Rational.

Proceedings of the 42nd International Symposium on Mathematical Foundations of Computer Science, 2017

2016

Two-variable Logic with a Between Predicate.

CoRR, 2016

Two-variable Logic with a Between Relation.

Proceedings of the 31st Annual ACM/IEEE Symposium on Logic in Computer Science, 2016

Metric Temporal Logic with Counting.

Proceedings of the Foundations of Software Science and Computation Structures, 2016

2015

Metric Temporal Logic with Counting.

CoRR, 2015

2014

Deterministic Logics for UL.

CoRR, 2014

Partially Punctual Metric Temporal Logic is Decidable.

CoRR, 2014

Partially Punctual Metric Temporal Logic is Decidable.

Proceedings of the 21st International Symposium on Temporal Representation and Reasoning, 2014

On Unary Fragments of MTL and TPTL over Timed Words.

Proceedings of the Theoretical Aspects of Computing - ICTAC 2014, 2014

2013

On the Decidability and Complexity of Some Fragments of Metric Temporal Logic

CoRR, 2013

The Unary Fragments of Metric Interval Temporal Logic: Bounded versus Lower bound Constraints (Full Version)

CoRR, 2013

Deterministic Logics for UL.

Proceedings of the Theoretical Aspects of Computing - ICTAC 2013, 2013

2012

The Unary Fragments of Metric Interval Temporal Logic: Bounded versus Lower Bound Constraints.

Proceedings of the Automated Technology for Verification and Analysis, 2012

An Introduction to Timed Automata.

Modern Applications of Automata Theory, 2012

Chop Expressions and Discrete Duration Calculus.

Modern Applications of Automata Theory, 2012

2011

On Expressive Powers of Timed Logics: Comparing Boundedness, Non-punctuality and Deterministic Freezing

CoRR, 2011

On Construction of Safety Signal Automata for $MITL[\: \mathcal{U}, \: \mathcal{S}]$ Using Temporal Projections.

Proceedings of the Formal Modeling and Analysis of Timed Systems, 2011

On Expressive Powers of Timed Logics: Comparing Boundedness, Non-punctuality, and Deterministic Freezing.

Proceedings of the CONCUR 2011 - Concurrency Theory - 22nd International Conference, 2011

2010

Unambiguity in Timed Regular Languages: Automata and Logics.

Proceedings of the Formal Modeling and Analysis of Timed Systems, 2010

Around Dot Depth Two.

Proceedings of the Developments in Language Theory, 14th International Conference, 2010

2009

Determinization and Expressiveness of Integer Reset Timed Automata with Silent Transitions.

Proceedings of the Language and Automata Theory and Applications, 2009

2008

Efficient guided symbolic reachability using reachability expressions.

STTT, 2008

Timed and Hybrid Automata in SAL.

Proceedings of the SYNASC 2008, 2008

Marking the chops: an unambiguous temporal logic.

Proceedings of the Fifth IFIP International Conference On Theoretical Computer Science, 2008

Timed Automata with Integer Resets: Language Inclusion and Expressiveness.

Proceedings of the Formal Modeling and Analysis of Timed Systems, 2008

Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts.

Proceedings of the 45th Design Automation Conference, 2008

2007

On Sampling Abstraction of Continuous Time Logic with Durations.

Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2007

2006

Efficient Guided Symbolic Reachability Using Reachability Expressions.

Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2006

Representation, Verification, and Computation of Timed Properties in Web.

Proceedings of the 2006 IEEE International Conference on Web Services (ICWS 2006), 2006

A Dose of Timed Logic, in Guarded Measure.

Proceedings of the Formal Modeling and Analysis of Timed Systems, 2006

Timed Modelling and Analysis in Web Service Compositions.

Proceedings of the The First International Conference on Availability, 2006

2005

Finding Extremal Models of Discrete Duration Calculus formulae using Symbolic Search.

Electr. Notes Theor. Comput. Sci., 2005

Bounded Validity Checking of Interval Duration Logic.

Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2005

Modal Strength Reduction in Quantified Discrete Duration Calculus.

Proceedings of the FSTTCS 2005: Foundations of Software Technology and Theoretical Computer Science, 2005

2003

Digitizing Interval Duration Logic.

Proceedings of the Computer Aided Verification, 15th International Conference, 2003

2002

Interval Duration Logic: Expressiveness and Decidability.

Electr. Notes Theor. Comput. Sci., 2002

The Saga of Synchronous Bus Arbiter: On Model Checking Quantitative Timing Properties of Synchronous Programs.

Electr. Notes Theor. Comput. Sci., 2002

2001

Model Checking CTL*[DC].

Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2001

1998

Toward a theory of sequential hybrid programs.

Proceedings of the Programming Concepts and Methods, 1998

Some Decidability Results for Duration Calculus under Synchronous Interpretation.

Proceedings of the Formal Techniques in Real-Time and Fault-Tolerant Systems, 1998

Duration Calculus of Weakly Monotonic Time.

Proceedings of the Formal Techniques in Real-Time and Fault-Tolerant Systems, 1998

Recursive Mean-Value Calculus.

Proceedings of the Foundations of Software Technology and Theoretical Computer Science, 1998

1996

Weak Chop Inverses and Liveness in Mean-Value Calculus.

Proceedings of the Formal Techniques in Real-Time and Fault-Tolerant Systems, 1996

1995

Finite Divergence.

Theor. Comput. Sci., 1995

Some Extensions to Propositional Mean-Value Caculus: Expressiveness and Decidability.

Proceedings of the Computer Science Logic, 9th International Workshop, 1995

1994

Formal Design of Hybrid Systems.

Proceedings of the Formal Techniques in Real-Time and Fault-Tolerant Systems, Third International Symposium Organized Jointly with the Working Group Provably Correct Systems, 1994

A Calculus for Hybrid Sampled Data Systems.

Proceedings of the Formal Techniques in Real-Time and Fault-Tolerant Systems, Third International Symposium Organized Jointly with the Working Group Provably Correct Systems, 1994

On the Computational Power of Operators in ICSP with Fairness.

Proceedings of the Foundations of Software Technology and Theoretical Computer Science, 1994

1993

Infinitary Parallelism without Unbounded Nondeterminism in CSP.

Acta Inf., 1993

ICSP and Its Relationship with ACSP and CSP.

Proceedings of the Foundations of Software Technology and Theoretical Computer Science, 1993

Verification Tools in the Development of Provably Correct Compilers.

Proceedings of the FME '93: Industrial-Strength Formal Methods, 1993

1992

Reasoning Algebraically about Recursion.

Sci. Comput. Program., 1992

1991

P - A Logic - A Compositional Proof System for Distributed Programs.

Distributed Computing, 1991

1990

An Approach to Verifiable Compiling Specification and Prototyping.

Proceedings of the Programming Language Implementation and Logic Programming, 1990

1989

Some Comments on the Assumption-Commitment Framework for Compositional Verification of Distributed Programs.

Proceedings of the Stepwise Refinement of Distributed Systems, 1989

1986

A Structure-Directed Total Correctness Proof Rule for Recursive Procedure Calls.

Comput. J., 1986

Finding Response Times in a Real-Time System.

Comput. J., 1986