Paritosh Kumar Sinha

According to our database¹, Paritosh Kumar Sinha authored at least 3 papers between 2024 and 2025.

Collaborative distances:

Timeline

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2025

Moving from RTL- to Handshake-based IP-Design: A RISC-V Case Study.

[DOI]

Proceedings of the 14th Mediterranean Conference on Embedded Computing, 2025

Target-Aware Automated RTL Generation for RISC-V SoC Designs: A Model-Driven Approach.

[DOI]

Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025

2024

The Argument for Meta-Modeling-Based Approaches to Hardware Generation Languages.

[DOI]

CoRR, 2024