Paul Edward McKechnie

According to our database1, Paul Edward McKechnie authored at least 6 papers between 2008 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2010
Validation and verification of the interconnection of hardware intellectual property blocks for FPGA-based packet processing systems.
PhD thesis, 2010

2009
Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring.
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, 2009

Automated instrumentation of FPGA-based systems for system-level transaction monitoring.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-Based Packet Processing Systems.
Proceedings of the FCCM 2009, 2009

2008
A type system for static typing of a domain-specific language.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008

The Gannet Service Manager: A Distributed Dataflow Controller for Heterogeneous Multi-core SoCs.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008


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