Michaela Blott

According to our database, Michaela Blott authored at least 68 papers between 1998 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL.

Marius Meyer, Tobias Kenter, Lucian Petrica, Kenneth O'Brien, Michaela Blott, Christian Plessl

CoRR, 2024

2023

On the RTL Implementation of FINN Matrix Vector Unit.

Syed Asad Alam, David Gregg, Giulio Gambardella, Thomas B. Preußer, Michaela Blott

ACM Trans. Embed. Comput. Syst., November, 2023

Fault-Tolerant Neural Network Accelerators With Selective TMR.

Timoteo García Bertoa, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, John McAllister

IEEE Des. Test, April, 2023

AMNES: Accelerating the computation of data correlation using FPGAs.

Monica Chiosa, Thomas B. Preußer, Michaela Blott, Gustavo Alonso

Proc. VLDB Endow., 2023

ACCL+: an FPGA-Based Collective Engine for Distributed Applications.

Zhenhao He, Dario Korolija, Yu Zhu, Benjamin Ramhorst, Tristan Laan, Lucian Petrica, Michaela Blott, Gustavo Alonso

CoRR, 2023

Post-Training Quantization with Low-precision Minifloats and Integers on FPGAs.

Shivam Aggarwal, Alessandro Pappalardo, Hans Jakob Damsgaard, Giuseppe Franco, Thomas B. Preußer, Michaela Blott, Tulika Mitra

CoRR, 2023

2022

Elastic-DF: Scaling Performance of DNN Inference in FPGA Clouds through Automatic Partitioning.

Tobias Alonso, Lucian Petrica, Mario Ruiz, Jakoba Petri-Koenig, Yaman Umuroglu, Ioannis Stamelos, Elias Koromilas, Michaela Blott, Kees A. Vissers

ACM Trans. Reconfigurable Technol. Syst., 2022

RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures.

Felix Jentzsch, Yaman Umuroglu, Alessandro Pappalardo, Michaela Blott, Marco Platzner

IEEE Micro, 2022

Applications and Techniques for Fast Machine Learning in Science.

Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Dongning Guo, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Shen Wang, Thomas K. Warburton

Frontiers Big Data, 2022

Evaluating Theoretical Baselines for ML Benchmarking Across Different Accelerators.

Michaela Blott, Alina Vasilciuc, Miriam Leeser, Linda Doyle

IEEE Des. Test, 2022

Implementing Neural Network-Based Equalizers in a Coherent Optical Transmission System Using Field-Programmable Gate Arrays.

Pedro J. Freire, Sasipim Srivallapanondh, Michael Anderson, Bernhard Spinnler, Thomas Bex, Tobias A. Eriksson, Antonio Napoli, Wolfgang Schairer, Nelson Costa, Michaela Blott, Sergei K. Turitsyn, Jaroslaw E. Prilepsky

CoRR, 2022

LL-GNN: Low Latency Graph Neural Networks on FPGAs for Particle Detectors.

Zhiqiang Que, Marcus Loo, Hongxiang Fan, Michaela Blott, Maurizio Pierini, Alexander D. Tapper, Wayne Luk

CoRR, 2022

Towards FPGA Implementation of Neural Network-Based Nonlinearity Mitigation Equalizers in Coherent Optical Transmission Systems.

Pedro J. Freire, Michael Anderson, Bernhard Spinnler, Thomas Bex, Jaroslaw E. Prilepsky, Tobias A. Eriksson, Nelson Costa, Wolfgang Schairer, Michaela Blott, Antonio Napoli, Sergei K. Turitsyn

CoRR, 2022

Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark.

Hendrik Borras, Giuseppe Di Guglielmo, Javier M. Duarte, Nicolò Ghielmetti, Benjamin Hawks, Scott Hauck, Shih-Chieh Hsu, Ryan Kastner, Jason Liang, Andres Meza, Jules Muhizi, Tai Nguyen, Rushil Roy, Nhan Tran, Yaman Umuroglu, Olivia Weng, Aidan Yokuda, Michaela Blott

CoRR, 2022

QONNX: Representing Arbitrary-Precision Quantized Neural Networks.

Alessandro Pappalardo, Yaman Umuroglu, Michaela Blott, Jovan Mitrevski, Benjamin Hawks, Nhan Tran, Vladimir Loncar, Sioni Summers, Hendrik Borras, Jules Muhizi, Matthew Trahms, Shih-Chieh Hsu, Scott Hauck, Javier M. Duarte

CoRR, 2022

EcoFlow: Efficient Convolutional Dataflows for Low-Power Neural Network Accelerators.

Lois Orosa, Skanda Koppula, Yaman Umuroglu, Konstantinos Kanellopoulos, Juan Gómez-Luna, Michaela Blott, Kees A. Vissers, Onur Mutlu

CoRR, 2022

On the RTL Implementation of FINN Matrix Vector Compute Unit.

Syed Asad Alam, David Gregg, Giulio Gambardella, Michael Preußer, Michaela Blott

CoRR, 2022

Machine Learning Aided Hardware Resource Estimation for FPGA DNN Implementations.

Dana Diaconu, Lucian Petrica, Michaela Blott, Miriam Leeser

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

2021

Evaluation of Optimized CNNs on Heterogeneous Accelerators Using a Novel Benchmarking Approach.

Michaela Blott, Nicholas J. Fraser, Giulio Gambardella, Lisa Halder, Johannes Kath, Zachary Neveu, Yaman Umuroglu, Alina Vasilciuc, Miriam Leeser, Linda Doyle

IEEE Trans. Computers, 2021

Benchmarking vision kernels and neural network inference accelerators on embedded platforms.

Murad Qasaimeh, Kristof Denolf, Alireza Khodamoradi, Michaela Blott, Jack Lo, Lisa Halder, Kees A. Vissers, Joseph Zambreno, Phillip H. Jones

J. Syst. Archit., 2021

Performance vs. hardware requirements in state-of-the-art automatic speech recognition.

Alexandru-Lucian Georgescu, Alessandro Pappalardo, Horia Cucu, Michaela Blott

EURASIP J. Audio Speech Music. Process., 2021

Applications and Techniques for Fast Machine Learning in Science.

Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Thomas K. Warburton, Maria Acosta Flechas, Anthony Aportela, Thomas Calvet, Leonardo Cristella, Daniel Diaz, Caterina Doglioni, Maria Domenica Galati, Elham E Khoda, Farah Fahim, Davide Giri, Benjamin Hawks, Duc Hoang, Burt Holzman, Shih-Chieh Hsu, Sergo Jindariani, Iris Johnson, Raghav Kansal, Ryan Kastner, Erik Katsavounidis, Jeffrey D. Krupa, Pan Li, Sandeep Madireddy, Ethan Marx, Patrick McCormack, Andres Meza, Jovan Mitrevski, Mohammed Attia Mohammed, Farouk Mokhtar, Eric A. Moreno, Srishti Nagu, Rohin Narayan, Noah Palladino, Zhiqiang Que, Sang Eon Park, Subramanian Ramamoorthy, Dylan S. Rankin, Simon Rothman, Ashish Sharma, Sioni Summers, Pietro Vischia, Jean-Roch Vlimant, Olivia Weng

CoRR, 2021

ACCL: FPGA-Accelerated Collectives over 100 Gbps TCP-IP.

Zhenhao He, Daniele Parravicini, Lucian Petrica, Kenneth O'Brien, Gustavo Alonso, Michaela Blott

Proceedings of the IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing, 2021

Optimized Implementation of the HPCG Benchmark on Reconfigurable Hardware.

Alberto Zeni, Kenneth O'Brien, Michaela Blott, Marco D. Santambrogio

Proceedings of the Euro-Par 2021: Parallel Processing, 2021

2020

FAT: Training Neural Networks for Reliable Inference Under Hardware Faults.

Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Kees A. Vissers

Proceedings of the IEEE International Test Conference, 2020

Memory-Efficient Dataflow Inference for Deep CNNs on FPGA.

Lucian Petrica, Tobias Alonso, Mairin Kroes, Nicholas J. Fraser, Sorin Cotofana, Michaela Blott

Proceedings of the International Conference on Field-Programmable Technology, 2020

DarwiNN: efficient distributed neuroevolution under communication constraints.

Gurshaant Singh Malik, Lucian Petrica, Nachiket Kapre, Michaela Blott

Proceedings of the GECCO '20: Genetic and Evolutionary Computation Conference, 2020

Evolutionary bin packing for memory-efficient dataflow inference acceleration on FPGA.

Mairin Kroes, Lucian Petrica, Sorin Cotofana, Michaela Blott

Proceedings of the GECCO '20: Genetic and Evolutionary Computation Conference, 2020

LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications.

Yaman Umuroglu, Yash Akhauri, Nicholas James Fraser, Michaela Blott

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

LPAC: A Low-Precision Accelerator for CNN on FPGAs.

Tianyu Zhang, Tiantian Han, Lu Tian, Yi Li, Xijie Jia, Guangdong Liu, Pingbo An, Yingran Tan, Lingzhi Sui, Shaoxia Fang, Dongliang Xie, Michaela Blott, Yi Shan

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Evaluation of Optimized CNNs on FPGA and non-FPGA based Accelerators using a Novel Benchmarking Approach.

Michaela Blott, Johannes Kath, Lisa Halder, Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Miriam Leeser, Linda Doyle

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

High-Throughput DNN Inference with LogicNets.

Yaman Umuroglu, Yash Akhauri, Nicholas J. Fraser, Michaela Blott

Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

2019

QuTiBench: Benchmarking Neural Networks on Heterogeneous Hardware.

Michaela Blott, Lisa Halder, Miriam Leeser, Linda Doyle

ACM J. Emerg. Technol. Comput. Syst., 2019

Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs.

Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Efficient Error-Tolerant Quantized Neural Network Accelerators.

Giulio Gambardella, Johannes Kappauf, Michaela Blott, Christoph Doehring, Martin Kumm, Peter Zipf, Kees A. Vissers

Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

2018

FINN-<i>R</i>: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks.

Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser, Kees A. Vissers

ACM Trans. Reconfigurable Technol. Syst., 2018

FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks.

Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu

CoRR, 2018

Designing scalable FPGA architectures using high-level synthesis.

Johannes de Fine Licht, Michaela Blott, Torsten Hoefler

Proceedings of the 23rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2018

FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs.

Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Customizing Low-Precision Deep Neural Networks for FPGAs.

Julian Faraone, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Philip H. W. Leong, David Boland

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Inference of quantized neural networks on heterogeneous all-programmable devices.

Thomas B. Preußer, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks.

Julian Faraone, Nicholas J. Fraser, Michaela Blott, Philip H. W. Leong

Proceedings of the 2018 IEEE Conference on Computer Vision and Pattern Recognition, 2018

Accuracy to Throughput Trade-Offs for Reduced Precision Neural Networks on Reconfigurable Logic.

Jiang Su, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Gianluca Durelli, David B. Thomas, Philip Heng Wai Leong, Peter Y. K. Cheung

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017

Databases on Future Hardware (Dagstuhl Seminar 17101).

Gustavo Alonso, Michaela Blott, Jens Teubner

Dagstuhl Reports, 2017

Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks.

Julian Faraone, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong

Proceedings of the Neural Information Processing - 24th International Conference, 2017

Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic.

Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Scaling Binarized Neural Networks on Reconfigurable Logic.

Nicholas J. Fraser, Yaman Umuroglu, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers

Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms, 2017

FINN: A Framework for Fast, Scalable Binarized Neural Network Inference.

Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

Architectural optimizations for high performance and energy efficient Smith-Waterman implementation on FPGAs using OpenCL.

Lorenzo Di Tucci, Kenneth O'Brien, Michaela Blott, Marco D. Santambrogio

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Towards exascale computing with heterogeneous architectures.

Kenneth O'Brien, Lorenzo Di Tucci, Gianluca Durelli, Michaela Blott

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

On How to Improve FPGA-Based Systems Design Productivity via SDAccel.

Giulia Guidi, Enrico Reggiani, Lorenzo Di Tucci, Gianluca Durelli, Michaela Blott, Marco D. Santambrogio

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Reconfigurable future for HPC.

Michaela Blott

Proceedings of the International Conference on High Performance Computing & Simulation, 2016

2015

A Hash Table for Line-Rate Data Processing.

Zsolt István, Gustavo Alonso, Michaela Blott, Kees A. Vissers

ACM Trans. Reconfigurable Technol. Syst., 2015

Scaling Out to a Single-Node 80Gbps Memcached Server with 40Terabytes of Memory.

Michaela Blott, Ling Liu, Kimon Karras, Kees A. Vissers

Proceedings of the 7th USENIX Workshop on Hot Topics in Storage and File Systems, 2015

Scalable 10Gbps TCP/IP Stack Architecture for Reconfigurable Hardware.

David Sidler, Gustavo Alonso, Michaela Blott, Kimon Karras, Kees A. Vissers, Raymond Carley

Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2014

OSNT: open source network tester.

Gianni Antichi, Muhammad Shahbaz, Yilong Geng, Noa Zilberman, G. Adam Covington, Marc Bruyere, Nick McKeown, Nick Feamster, Bob Felderman, Michaela Blott, Andrew W. Moore, Philippe Owezarski

IEEE Netw., 2014

High-Level Synthesis Case Study: Implementation of a Memcached Server.

Kimon Karras, Michaela Blott, Kees A. Vissers

CoRR, 2014

2013

Achieving 10Gbps Line-rate Key-value Stores with FPGAs.

Michaela Blott, Kimon Karras, Ling Liu, Kees A. Vissers, Jeremia Bär, Zsolt István

Proceedings of the 5th USENIX Workshop on Hot Topics in Cloud Computing, 2013

Dataflow architectures for 10Gbps line-rate key-value-stores.

Michaela Blott, Kees A. Vissers

Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

A flexible hash table design for 10GBPS key-value stores on FPGAS.

Zsolt István, Gustavo Alonso, Michaela Blott, Kees A. Vissers

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Architecture for an open source network tester.

Muhammad Shahbaz, Gianni Antichi, Yilong Geng, Noa Zilberman, G. Adam Covington, Marc Bruyere, Nick Feamster, Nick McKeown, Bob Felderman, Michaela Blott, Andrew W. Moore, Philippe Owezarski

Proceedings of the Symposium on Architecture for Networking and Communications Systems, 2013

2012

A Low-Latency Library in FPGA Hardware for High-Frequency Trading (HFT).

John W. Lockwood, Adwait Gupte, Nishit Mehta, Michaela Blott, Tom English, Kees A. Vissers

Proceedings of the IEEE 20th Annual Symposium on High-Performance Interconnects, 2012

2010

Design of a flexible high-speed FPGA-based flow monitor for next generation networks.

John McGlone, Roger F. Woods, Alan Marshall, Michaela Blott

Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

2009

Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring.

Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede

Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, 2009

Automated instrumentation of FPGA-based systems for system-level transaction monitoring.

Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-Based Packet Processing Systems.

Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede

Proceedings of the FCCM 2009, 2009

2001

Starburst: Building next-generation internet devices.

Ronald L. Sharp, Michaela Blott, Michael J. Coss, Bruce K. Ellis, David L. Majette, Vinay Purohit

Bell Labs Tech. J., 2001

1998

A Networked Frame Buffer with Windows Management Support.

Michaela Blott, Hans Eberle

Proceedings of the EUROMEDIA 1998 featuring WEBTEC-MEDIATEC-COMTEC-APTEC, 1998