Paul Kollaritsch

According to our database1, Paul Kollaritsch authored at least 4 papers between 1988 and 1993.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

1993
Efficient Floorplan Enumeration Using Dynamic Programming.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1989
A Unified Design Representation Can Work.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988
Area evaluation metrics for transistor placement.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

CLAY: a malleable-cell multi-cell transistor matrix approach for CMOS LAYout synthesis.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988


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