Sharat Prasad

According to our database, Sharat Prasad authored at least 8 papers between 1988 and 2000.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2000

Low-Power CMOS VLSI Circuit Design.

Kaushik Roy, Sharat Prasad

Wiley, ISBN: 978-0-471-11488-8, 2000

1998

LAPLUS: An Efficient, Effective and Stable Switch Algorithm for Flow Control of the Available Bit Rate ATM Service.

Sharat Prasad, Kamran Kiasaleh, Poras T. Balsara

Proceedings of the Proceedings IEEE INFOCOM '98, The Conference on Computer Communications, Seventeenth Annual Joint Conference of the IEEE Computer and Communications Societies, Gateway to the 21st Century, San Francisco, CA, USA, March 29, 1998

1994

Estimation of circuit activity considering signal correlations and simultaneous switching.

Tan-Li Chou, Kaushik Roy, Sharat Prasad

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Power Dissipation Driven FPGA Place and Route Under Delay Constraints.

Kaushik Roy, Sharat Prasad

Proceedings of the Field-Programmable Logic, 1994

Logic synthesis for reliability - an early start to controlling electromigration and hot carrier effects.

Kaushik Roy, Sharat Prasad

Proceedings of the Proceedings EURO-DAC'94, 1994

1993

Efficient Floorplan Enumeration Using Dynamic Programming.

Sharat Prasad, Paul Kollaritsch, P. Anirudhan, D. K. Hwang, Steve Lusky, R. Farrow

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1992

SYCLOP: Synthesis of CMOS Logic for Low Power Applications.

Kaushik Roy, Sharat Prasad

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1988

CLAY: a malleable-cell multi-cell transistor matrix approach for CMOS LAYout synthesis.

Paul Kollaritsch, Steve Lusky, Sharat Prasad, Neil Potter

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988