Paul Shipley

According to our database1, Paul Shipley authored at least 2 papers between 1996 and 1997.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1997
A prototype chipset for a large scaleable ATM switching node.
Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997

1996
A High Speed VLSI Architecture for Scaleable ATM Switches.
Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996


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