Petter Källström

According to our database1, Petter Källström authored at least 7 papers between 2011 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
An Architecture for Grant-Free Massive MIMO MTC Based on Compressive Sensing.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

2017
Efficient FPGA Mapping of Pipeline SDF FFT Cores.
IEEE Trans. Very Large Scale Integr. Syst., 2017

2016
CORDIC II: A New Improved CORDIC Algorithm.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

Fast and area efficient adder for wide data in recent Xilinx FPGAs.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2012
Using DSP block pre-adders in pipeline SDF FFT implementations in contemporary FPGAs.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Low-complexity rotators for the FFT using base-3 signed stages.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011
Magnitude scaling for increased SFDR in DDFS.
Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011


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