Phaisit Chewputtanagul

According to our database, Phaisit Chewputtanagul authored at least 6 papers between 2002 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2007

A Novel Hardware Architecture for Scalable Binary Morphological and Mask-Based Image Processing.

David Jeff Jackson, Songpol Ongwattanakul, Phaisit Chewputtanagul, Kenneth G. Ricks, William A. Stapleton

Int. J. Comput. Their Appl., 2007

2003

Quaternary Arithmetic Logic Unit on a Programmable Logic Device.

Songpol Ongwattanakul, Phaisit Chewputtanagul, David Jeff Jackson, Kenneth G. Ricks

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

Scalable giga-pixels/s binary image morphological operations.

Songpol Ongwattanakul, Phaisit Chewputtanagul, David Jeff Jackson, Kenneth G. Ricks

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A Programmable Logic-Based Implementation of Ultra-Fast Parallel Binary Image Morphological Operations.

Songpol Ongwattanakul, Phaisit Chewputtanagul, David Jeff Jackson, Kenneth G. Ricks

Proceedings of the ISCA 18th International Conference Computers and Their Applications, 2003

Implementation and Performance Evaluation of Intel VTUNE Image Processing Functions in the MATLAB Environment.

Phaisit Chewputtanagul, David Jeff Jackson, Kenneth G. Ricks

Proceedings of the ISCA 18th International Conference Computers and Their Applications, 2003

2002

Memory-Cordie Algorithm for Embedded Programmable Logic Device Designs.

Xianwei Wu, Phaisit Chewputtanagul, David Jeff Jackson, Tim A. Haskew

Proceedings of the ISCA 17th International Conference Computers and Their Applications, 2002