Po-Kuan Huang

According to our database1, Po-Kuan Huang authored at least 13 papers between 2006 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
Human machine interface by using stereo-based depth extraction.
Proceedings of the Three-Dimensional Image Processing, 2014

2013
Stereo matching architecture for 3D pose/gesture recognition and distance-measuring application.
Proceedings of the International Conference on 3D Imaging, 2013

2012
Real-time stereo matching for 3D hand gesture recognition.
Proceedings of the International SoC Design Conference, 2012

3D Gesture Touchless Control Based on Real-Time Stereo Matching.
Proceedings of the Computer Vision - ECCV 2012. Workshops and Demonstrations, 2012

2009
Energy-Aware Compilation for Embedded Processors with Technology Scaling Considerations.
J. Low Power Electron., 2009

2008
System-Level Performance Estimation for Application-Specific MPSoC Interconnect Synthesis.
Proceedings of the IEEE Symposium on Application Specific Processors, 2008

2007
Efficient and scalable compiler-directed energy optimization for realtime applications.
ACM Trans. Design Autom. Electr. Syst., 2007

Joint throughput and energy optimization for pipelined execution of embedded streaming applications.
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, 2007

2006
Probabilistic delay budget assignment for synthesis of soft real-time applications.
IEEE Trans. Very Large Scale Integr. Syst., 2006

A Unified Theory of Timing Budget Management.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Probabilistic Delay Budgeting for Soft Realtime Applications.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Leakage-aware intraprogram voltage scaling for embedded processors.
Proceedings of the 43rd Design Automation Conference, 2006


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