Po-Yen Chien

According to our database1, Po-Yen Chien authored at least 2 papers between 2014 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Deeply scaled VLSI analog transistor design and optimization.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2014
Improved device variability in scaled MOSFETs with deeply retrograde channel profile.
Microelectron. Reliab., 2014


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