Pol Maistriaux

According to our database, Pol Maistriaux authored at least 5 papers between 2022 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2025

IMAGINE: An 8-to-1b 22nm FD-SOI Compute-In-Memory CNN Accelerator With an End-to-End Analog Charge-Based 0.15-8POPS/W Macro Featuring Distribution-Aware Data Reshaping.

Adrian Kneip, Martin Lefebvre, Pol Maistriaux, David Bol

IEEE Trans. Circuits Syst. Artif. Intell., September, 2025

Sloth: A Kernel-Bypass Scheduler Maximizing Energy Efficiency under Latency Constraints.

Clément Delzotti, Pol Maistriaux, Tom Barbette

Proceedings of the 2025 IFIP Networking Conference, Limassol, Cyprus, 26-30 May 2025., 2025

2024

A Narrowband RF Front End in 22-nm FD-SOI Featuring a Programmable Low-Noise Amplifier with a Configurable Noise-Power Trade-Off.

Marco Gonzalez, Pol Maistriaux, David Bol

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Leveraging a Digital Chirp Spread Spectrum Detector for LPWAN Wake-Up Receivers.

Pol Maistriaux, Marco Gonzalez, Jérôme Louveaux, David Bol

Proceedings of the 14th International Symposium on Communication Systems, 2024

2022

Modeling the Carbon Footprint of Battery-Powered IoT Sensor Nodes for Environmental-Monitoring Applications.

Pol Maistriaux, Thibault Pirson, Maxime Schramme, Jérôme Louveaux, David Bol

Proceedings of the 12th International Conference on the Internet of Things, 2022