Pooyan Sakian

According to our database1, Pooyan Sakian authored at least 2 papers between 2008 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2011
System Level Receiver Design for Minimum Sensitivity to Process Variations.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

2008
Low-power analogue phase interpolator based clock and data recovery with high-frequency tolerance.
IET Circuits Devices Syst., 2008


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