Qingchen Zhai

According to our database1, Qingchen Zhai authored at least 9 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Breaking the Local Optima Barrier in Branch Predictor Design Space Exploration: An LLM-Based Initialization Strategy for PSO.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

RTCore: A RISC-V Processor Featuring Nested Hardware Loop Optimization for Real-time Control System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

Boosting Vector Instruction Throughput in RISC-V via a Hybrid Decoupled Architecture with VLIW-Driven Execution.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

Towards Trustworthy LLM-Based Assertion Generation: A Data Augmentation Framework with Formal Check Approach.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

LiveVerilogEval: Contamination Free and Automatically Scalable Benchmark for Verilog Code Generation.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025
Instruction Level Parallelism Optimizations in a High-Performance Dual-Issue RISC-V Processor for Real-Time Control Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Using Greedy-Enhanced Heuristic to Optimize Instruction Scheduling for RISC-V DS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

A Lightweight RISC-V Multi-Core Interaction Framework For Embedded Real-Time Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024
LLM Based End-to-end Branch Predictor Optimization Generator.
Proceedings of the 35th IEEE International Conference on Application-specific Systems, 2024


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