Qingcheng Xiao

Orcid: 0000-0001-6230-5342

According to our database1, Qingcheng Xiao authored at least 9 papers between 2017 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2022
FCNNLib: A Flexible Convolution Algorithm Library for Deep Learning on FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Towards Agile DNN Accelerator Design Using Incremental Synthesis on FPGAs.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

2021
HASCO: Towards Agile HArdware and Software CO-design for Tensor Computation.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020
Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Fune: An FPGA Tuning Framework for CNN Acceleration.
IEEE Des. Test, 2020

FCNNLib: An Efficient and Flexible Convolution Algorithm Library on FPGAs.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Zac: Towards Automatic Optimization and Deployment of Quantized Deep Neural Networks on Embedded Devices.
Proceedings of the International Conference on Computer-Aided Design, 2019

2017
Enabling high performance deep learning networks on embedded systems.
Proceedings of the IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, October 29, 2017

Exploring Heterogeneous Algorithms for Accelerating Deep Convolutional Neural Networks on FPGAs.
Proceedings of the 54th Annual Design Automation Conference, 2017


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