Liqiang Lu

Orcid: 0000-0002-3801-6847

According to our database¹, Liqiang Lu authored at least 55 papers between 2017 and 2026.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

Legend:

Book In proceedings Article PhD thesis Dataset Other

Bibliography

2026

HeteroQNN: Enabling Distributed QNN Under Heterogeneous Quantum Devices.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2026

A Review of Quantum Computing Systems and Software.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., January, 2026

TENET-v2: Applying Relation-Centric Notation to Model and Optimize Data Swizzle in the Cache of Modern NPU.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

CLINE: Improving Control Flow Compilation of Quantum Programs with Control Line Encoding.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

ORANGE: Exploring Ockham's Razor for Neural Rendering by Accelerating 3DGS on NPUs with GEMM-Friendly Blending and Balanced Workloads.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

2025

A Tale of 1001 LoC: Potential Runtime Error-Guided Specification Synthesis for Verifying Large-Scale Programs.

[BibT_eX]

[DOI]

CoRR, December, 2025

AdaptDQC: Adaptive Distributed Quantum Computing With Quantitative Performance Analysis.

[BibT_eX]

[DOI]

IEEE Trans. Computers, October, 2025

UKFaaS: Lightweight, High-Performance and Secure FaaS Communication With Unikernel.

[BibT_eX]

[DOI]

IEEE Trans. Computers, October, 2025

SmartQCache: Fast and Precise Pulse Control With Near-Quantum Cache Design on FPGA.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2025

QuST: Optimizing Quantum Neural Network Against Spatial and Temporal Noise Biases.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2025

Triton-distributed: Programming Overlapping Kernels on Distributed AI Systems with the Triton Compiler.

[BibT_eX]

[DOI]

CoRR, April, 2025

HornBro: Homotopy-Like Method for Automated Quantum Program Repair.

[BibT_eX]

[DOI]

Proc. ACM Softw. Eng., 2025

YOUTIAO: Hybrid Multiplexing with Dynamic Qubit Grouping for Low-cost and Scalable Quantum Wiring.

[BibT_eX]

[DOI]

Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

Vegapunk: Accurate and Fast Decoding for Quantum LDPC Codes with Online Hierarchical Algorithm and Sparse Accelerator.

[BibT_eX]

[DOI]

Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

Rasengan: A Transition Hamiltonian-based Approximation Algorithm for Solving Constrained Binary Optimization Problems.

[BibT_eX]

[DOI]

Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

ARTERY: Fast Quantum Feedback using Branch Prediction.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025

Qtenon: Towards Low-Latency Architecture Integration for Accelerating Hybrid Quantum-Classical Computing.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025

Horae: A Domain-Agnostic Language for Automated Service Regulation.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Fourth International Joint Conference on Artificial Intelligence, 2025

VeriRL: Boosting the LLM-based Verilog Code Generation via Reinforcement Learning.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

Choco-Q: Commute Hamiltonian-based QAOA for Constrained Binary Optimization.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025

Empowering Quantum Error Traceability with MoE for Automatic Calibration.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference, 2025

SAPO: Improving the Scalability and Accuracy of Quantum Linear Solver for Portfolio Optimization.

[BibT_eX]

[DOI]

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

DyREM: Dynamically Mitigating Quantum Readout Error with Embedded Accelerator.

[BibT_eX]

[DOI]

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

PISA: Efficient Precision-Slice Framework for LLMs with Adaptive Numerical Type.

[BibT_eX]

[DOI]

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

ArbiterQ: Improving QNN Convergency and Accuracy by Applying Personalized Model on Heterogeneous Quantum Devices.

[BibT_eX]

[DOI]

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

QRAMsim: Efficiently Simulating, Analyzing, and Optimizing Large-Scale Quantum Random Access Memory.

[BibT_eX]

[DOI]

Proceedings of the Advanced Parallel Processing Technologies, 2025

DyQNet: Optimizing Dynamic Entanglement Routing with Online Request in Quantum Network.

[BibT_eX]

[DOI]

Proceedings of the Advanced Parallel Processing Technologies, 2025

2024

Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2024

SpREM: Exploiting Hamming Sparsity for Fast Quantum Readout Error Mitigation.

[BibT_eX]

[DOI]

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

MorphQPV: Exploiting Isomorphism in Quantum Programs to Facilitate Confident Verification.

[BibT_eX]

[DOI]

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

QuFEM: Fast and Accurate Quantum Readout Calibration Using the Finite Element Method.

[BibT_eX]

[DOI]

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

Automatic Generation of Spatial Accelerator for Tensor Algebra.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

QuCT: A Framework for Analyzing Quantum Circuit by Extracting Contextual and Topological Features.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

QPulseLib: Accelerating the Pulse Generation of Quantum Circuit with Reusable Patterns.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

HyQSAT: A Hybrid Approach for 3-SAT Problems by Integrating Quantum Annealer with CDCL.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

SSiMD: Supporting Six Signed Multiplications in a DSP Block for Low-Precision CNN on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Technology, 2023

Calabash: Accelerating Attention Using a Systolic Array Chain on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Rubick: A Synthesis Framework for Spatial Architectures via Dataflow Decomposition.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Morphling: A Reconfigurable Architecture for Tensor Computation.

[BibT_eX]

[DOI]

Liqiang Lu

Yun Liang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

FCNNLib: A Flexible Convolution Algorithm Library for Deep Learning on FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

An Efficient Hardware Design for Accelerating Sparse CNNs With NAS-Based Models.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

AMOS: enabling automatic mapping for tensor computations on spatial accelerators with hardware abstraction.

[BibT_eX]

[DOI]

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

2021

OMNI: A Framework for Integrating Hardware and Software Optimizations for Sparse CNNs.

[BibT_eX]

[DOI]

Yun Liang

Liqiang Lu

Jiaming Xie

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Sanger: A Co-Design Framework for Enabling Sparse Attention using Reconfigurable Architecture.

[BibT_eX]

[DOI]

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Analyzing the Design Space of Spatial Tensor Accelerators on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation.

[BibT_eX]

[DOI]

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

TensorLib: A Spatial Accelerator Generation Framework for Tensor Algebra.

[BibT_eX]

[DOI]

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Enabling Efficient Fast Convolution Algorithms on GPUs via MegaKernels.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2020

Generating Systolic Array Accelerators With Reusable Blocks.

[BibT_eX]

[DOI]

IEEE Micro, 2020

FCNNLib: An Efficient and Flexible Convolution Algorithm Library on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Speedy: An Accelerator for Sparse Convolutional Neural Networks on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

An Efficient Hardware Accelerator for Sparse Convolutional Neural Networks on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018

SpWA: an efficient sparse winograd convolutional neural networks accelerator on FPGAs.

[BibT_eX]

[DOI]

Liqiang Lu

Yun Liang

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

Exploring Heterogeneous Algorithms for Accelerating Deep Convolutional Neural Networks on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

Liqiang Lu

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