Ranjani Parthasarathi

According to our database, Ranjani Parthasarathi authored at least 50 papers between 1989 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Machine Learning based Waveform Predictions using Discrete Wavelet Transform for Automated Verification of Analog and Mixed Signal Integrated Circuits.

J. Dhurga Devi, Bama Srinivasan, Selvi Ravindran, Ranjani Parthasarathi, P. V. Ramakrishna, Lakshmanan Balasubramanian

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

Enhancement in Reliability for Multi-core system consisting of One Instruction Cores.

Shashikiran Venkatesha, Ranjani Parthasarathi

CoRR, 2023

Analysis of Machine Learning Techniques for Time Domain Waveform Prediction in Analog and Mixed Signal Integrated Circuit Verification.

Dhanasekar V, Vinodhini Gunasekaran, Anusha Challa, Bama Srinivasan, J. Dhurga Devi, Selvi Ravindran, Ranjani Parthasarathi, P. V. Ramakrishna, Gopika Geetha Kumar, Venkateswaran Padmanabhan, Guha Lakshmanan, Lakshmanan Balasubramanian

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

2022

A Formalism to Specify Unambiguous Instructions Inspired by Mīmāṁsā in Computational Settings.

Bama Srinivasan, Ranjani Parthasarathi

Logica Universalis, 2022

A Survey of fault models and fault tolerance methods for 2D bus-based multi-core systems and TSV based 3D NOC many-core systems.

Shashikiran Venkatesha, Ranjani Parthasarathi

CoRR, 2022

2021

Performance counter based online pipeline bugs detection using machine learning techniques.

Padma Jayaraman, Ranjani Parthasarathi

Microprocess. Microsystems, 2021

A Survey of fault mitigation techniques for multi-core architectures.

Shashikiran Venkatesha, Ranjani Parthasarathi

CoRR, 2021

2020

Autotuning of configuration for program execution in GPUs.

Thanasekhar Balaiah, Ranjani Parthasarathi

Concurr. Comput. Pract. Exp., 2020

2019

Bootstrapping of Semantic Relation Extraction for a Morphologically Rich Language: Semi-Supervised Learning of Semantic Relations.

Balaji Jagan, Ranjani Parthasarathi, T. V. Geetha

Int. J. Semantic Web Inf. Syst., 2019

Controller Monitoring System In Software Defined Networks Using Random Forest Algorithm.

K. Kirutika, V. Vetri Selvi, Ranjani Parthasarathi, G. Subrahmanya V. R. K. Rao

Proceedings of the 2019 International Carnahan Conference on Security Technology, 2019

2017

Query Focused Summary Generation System using Unique Discourse Structure.

C. N. Subalalitha, Ranjani Parthasarathi

Int. J. Inf. Retr. Res., 2017

A Survey on Post-Silicon Functional Validation for Multicore Architectures.

Padma Jayaraman, Ranjani Parthasarathi

ACM Comput. Surv., 2017

Exploiting GPU memory hierarchy for accelerating a specialized stencil computation.

Thanasekhar Balaiah, Ranjani Parthasarathi

Concurr. Comput. Pract. Exp., 2017

A survey of imperatives and action representation formalisms.

Bama Srinivasan, Ranjani Parthasarathi

Artif. Intell. Rev., 2017

2016

Abstractive Summarization: A Hybrid Approach for the Compression of Semantic Graphs.

Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi

Int. J. Semantic Web Inf. Syst., 2016

Unsupervised learning of semantic relations of a morphologically rich language.

Balaji Jagan, Ranjani Parthasarathi, T. V. Geetha

Int. J. Inf. Commun. Technol., 2016

2015

Building a Language-Independent Discourse Parser using Universal Networking Language.

Chinnaudayar Navaneethakrishnan Subalalitha, Ranjani Parthasarathi

Comput. Intell., 2015

Automatic Construction of Tamil UNL Dictionary.

Ganesh J, Ranjani Parthasarathi, T. V. Geetha

Proceedings of the Mining Intelligence and Knowledge Exploration, 2015

2014

A Unique Indexing Technique for Discourse Structures.

Chinnaudayar Navaneethakrishnan Subalalitha, Ranjani Parthasarathi

J. Intell. Syst., 2014

Graph-Based Bootstrapping for Coreference Resolution.

Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi

J. Intell. Syst., 2014

A Graph Based Query Focused Multi-Document Summarization.

Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi

Int. J. Intell. Inf. Technol., 2014

Pattern Based Bootstrapping Technique for Tamil POS Tagging.

Jayabal Ganesh, Ranjani Parthasarathi, T. V. Geetha, Balaji Jagan

Proceedings of the Mining Intelligence and Knowledge Exploration, 2014

2013

An intelligent task analysis approach for special education based on MIRA.

Bama Srinivasan, Ranjani Parthasarathi

J. Appl. Log., 2013

2012

A Formalism for Action Representation Inspired by Mīmāṁsā.

Bama Srinivasan, Ranjani Parthasarathi

J. Intell. Syst., 2012

A deconverter framework for Malayalam.

Misiriya Shahul Hameed, C. N. Subalalitha, T. V. Geetha, Ranjani Parthasarathi

Proceedings of the 2012 International Conference on Advances in Computing, 2012

Two-Stage Bootstrapping for Anaphora Resolution.

Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi

Proceedings of the COLING 2012, 2012

2011

Mining ontological knowledge using Nyaya framework.

D. Judia Salome, Ranjani Parthasarathi

Int. J. Netw. Virtual Organisations, 2011

A Multilevel UNL Concept based Searching and Ranking.

E. Umamaheswari, T. V. Geetha, Ranjani Parthasarathi, Madhan Karky

Proceedings of the WEBIST 2011, 2011

A Language Independent Rhetorical Structure Framework Using Universal Networking Language.

C. N. Subalalitha, Ranjani Parthasarathi

Proceedings of the 5th Indian International Conference on Artificial Intelligence, 2011

Mimamsa Inspired Representation of Actions (MIRA).

Bama Srinivasan, Ranjani Parthasarathi

Proceedings of the 5th Indian International Conference on Artificial Intelligence, 2011

Anaphora Resolution in Tamil using Universal Networking Language.

Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi, Madhan Karky

Proceedings of the 5th Indian International Conference on Artificial Intelligence, 2011

2009

Practical and scalable evolution of digital circuits.

A. P. Shanthi, Ranjani Parthasarathi

Appl. Soft Comput., 2009

2008

Intrinsic Evolution of Large Digital Circuits Using a Modular Approach.

Shri Vidhya Alagesan, Sruthi Kannan, G. Shanthi, A. P. Shanthi, Ranjani Parthasarathi

Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008

2007

Trace Based Mobility Model for Ad Hoc Networks.

V. Vetri Selvi, Ranjani Parthasarathi

Proceedings of the Third IEEE International Conference on Wireless and Mobile Computing, 2007

An ASM Model for an Autonomous Network-Infrastructure Grid.

T. K. S. Lakshmi Priya, Ranjani Parthasarathi

Proceedings of the Third International Conference on Networking and Services (ICNS 2007), 2007

Mobile Ad Hoc Grid Using Trace Based Mobility Model.

V. Vetri Selvi, Shakir Sharfraz, Ranjani Parthasarathi

Proceedings of the Advances in Grid and Pervasive Computing, 2007

Evaluating the Network Processor Architecture for Application-Awareness.

T. K. S. Lakshmi Priya, V. Hari Prasad, D. Kannan, L. Karthik Singaram, G. Madhan, R. Meenakshi Sundaram, R. M. Prasad, Ranjani Parthasarathi

Proceedings of the Second International Conference on COMmunication System softWAre and MiddlewaRE (COMSWARE 2007), 2007

2005

Genetic learning based fault tolerant models for digital systems.

A. P. Shanthi, Ranjani Parthasarathi

Appl. Soft Comput., 2005

Architecture for an Active Network Infrastructure Grid - The <i>iSEGrid </i>.

T. K. S. Lakshmi Priya, Ranjani Parthasarathi

Proceedings of the Active and Programmable Networks, 2005

Evolution of Asynchronous Sequential Circuits.

A. P. Shanthi, L. Karthik Singaram, Ranjani Parthasarathi

Proceedings of the 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June, 2005

2004

An Active Framework for a WLAN Access Point Using Intel's IXP1200 Network Processor.

R. Sharmila, M. V. Lakshmi Priya, Ranjani Parthasarathi

Proceedings of the High Performance Computing, 2004

Enhancing the Development Based Evolution of Digital Circuits.

A. P. Shanthi, P. Muruganandam, Ranjani Parthasarathi

Proceedings of the 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 2004

2003

JBits Based Fault Tolerant Framework for Evolvable Hardware.

A. P. Shanthi, Balaji Vijayan, Manivel Rajendran, Senthilkumar Veluswami, Ranjani Parthasarathi

Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

Exploring FPGA Structures for Evolving Fault Tolerant Hardware.

A. P. Shanthi, Ranjani Parthasarathi

Proceedings of the 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 2003

Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem.

Mohan G. Kabadi, Ranjani Parthasarathi

Proceedings of the Advances in Computer Systems Architecture, 2003

2002

Dead-Block Elimination in Cache: A Mechanism to Reduce I-cache Power Consumption in High Performance Microprocessors.

Mohan G. Kabadi, Natarajan Kannan, Palanidaran Chidambaram, Suriya Narayanan, M. Subramanian, Ranjani Parthasarathi

Proceedings of the High Performance Computing, 2002

2001

A Reconfigurable Co-Processor for Variable Long Precision Arithmetic Using Indian Algorithms.

Ranjani Parthasarathi, Easwaran Raman, Karthik Sankaranarayanan, Lakshmi N. Chakrapani

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

1997

Multiple precision square root using the Dwandwa square-root algorithm.

Ranjani Parthasarathi, Ashok Jhunjhunwala

J. Syst. Archit., 1997

1995

Modified straight division: A computer implementation of multiple-precision division.

Ranjani Parthasarathi, Ashok Jhunjhunwala

Microprocess. Microprogramming, 1995

1989

Hardware monitoring of a multiprocessor system.

An-Chi Liu, Ranjani Parthasarathi

IEEE Micro, 1989