Lakshmanan Balasubramanian

According to our database1, Lakshmanan Balasubramanian authored at least 15 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2023
Analysis of Machine Learning Techniques for Time Domain Waveform Prediction in Analog and Mixed Signal Integrated Circuit Verification.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Analog Coverage-driven Selection of Simulation Corners for AMS Integrated Circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Tracking Coverage Artefacts for Periodic Signals using Sequence-based Abstractions.
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

2020
Pulse Width Insensitive Design and Verification Methods.
EAI Endorsed Trans. Cloud Syst., 2020

CoveRT: A Coverage Reporting Tool for Analog Mixed-Signal Designs.
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

The Notion of Cross Coverage in AMS Design Verification.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Low Power Mixed-Signal SoC Integration and Verification Challenges with Third Party IP Cores.
EAI Endorsed Trans. Cloud Syst., 2019

2015
New Methods for Simulation Speed-up and Test Qualification with Analog Fault Simulation.
Proceedings of the 28th International Conference on VLSI Design, 2015

On-chip measurement of bandgap reference voltage using a small form factor VCO based zoom-in ADC.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2013
Towards adaptive test of multi-core RF SoCs.
Proceedings of the Design, Automation and Test in Europe, 2013

2011
DFT for extremely low cost test of mixed signal SOCs with integrated RF and power management.
Proceedings of the 2011 IEEE International Test Conference, 2011

Circuit and DFT techniques for robust and low cost qualification of a mixed-signal SoC with integrated power management system.
Proceedings of the Design, Automation and Test in Europe, 2011

2004
Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate.
IEEE J. Solid State Circuits, 2004

2003
Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate.
Proceedings of the ESSCIRC 2003, 2003


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