Raoul Tawel

According to our database1, Raoul Tawel authored at least 10 papers between 1988 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2002
Parallel FPGA Implementation of the Split and Merge Discrete Wavelet Transform.
Proceedings of the Field-Programmable Logic and Applications, 2002

2001
Reconfigurable VLSI architectures for evolvable hardware: from experimental field programmable transistor arrays to evolution-oriented chips.
IEEE Trans. Very Large Scale Integr. Syst., 2001

2000
Evolution of Analog Circuits on Field Programmable Transistor Arrays.
Proceedings of the 2nd NASA / DoD Workshop on Evolvable Hardware (EH 2000), 2000

1999
Evolutionary Experiments with a Fine-Grained Reconfigurable Architecture for Analog and Digital CMOS Circuits.
Proceedings of the 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), 1999

1995
Execution of a remote sensing application on a custom neurocomputer.
IEEE Trans. Neural Networks, 1995

1993
A Hybrid Radial Basis Function Neurocomputer and Its Applications.
Proceedings of the Advances in Neural Information Processing Systems 6, 1993

Real-Time Focal-Plane Image Compression.
Proceedings of the IEEE Data Compression Conference, 1993

1992
Analog VLSI neural networks: implementation issues and examples in optimization and supervised learning.
IEEE Trans. Ind. Electron., 1992

1990
Analog parallel processor hardware for high-speed pattern recognition.
Proceedings of the Visual Communications and Image Processing '90: Fifth in a Series, 1990

1988
Does the Neuron "Learn" Like the Synapse?
Proceedings of the Advances in Neural Information Processing Systems 1, 1988


  Loading...