Richard Hersemeule

According to our database1, Richard Hersemeule authored at least 6 papers between 1999 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2010
A Markov chain based method for NoC end-to-end latency evaluation.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

An analytical method for evaluating Network-on-Chip performance.
Proceedings of the Design, Automation and Test in Europe, 2010

2008
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures.
Proceedings of the Design, Automation and Test in Europe, 2008

2003
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect.
Proceedings of the 1st ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2003), 2003

1999
Fast Prototyping: A System Design Flow Applied to a Complex System-on-Chip Multiprocessor Design.
Proceedings of the 36th Conference on Design Automation, 1999

Fast prototyping: a system design flow for fast design, prototyping and efficient IP reuse.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999


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