Richard Panek

According to our database, Richard Panek authored at least 15 papers between 2017 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

The Fault-tolerant Single-FPGA Systems with a Self-repair Reconfiguration Controller.

Richard Panek, Jakub Lojda

Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2021

Testing Embedded Software Through Fault Injection: Case Study on Smart Lock.

Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek

Proceedings of the 22nd IEEE Latin American Test Symposium, 2021

Automatically-Designed Fault-Tolerant Systems: Failed Partitions Recovery.

Jakub Lojda, Richard Panek, Zdenek Kotásek

Proceedings of the IEEE East-West Design & Test Symposium, 2021

Reliability Analysis of the FPGA Control System with Reconfiguration Hardening.

Richard Panek, Jakub Lojda, Jakub Podivinsky, Zdenek Kotásek

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Automatic Design of Fault-Tolerant Systems for VHDL and SRAM-based FPGAs.

Jakub Lojda, Richard Panek, Zdenek Kotásek

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2020

Reliability Analysis of Reconfiguration Controller for FPGA-Based Fault Tolerant Systems: Case Study.

Richard Panek, Jakub Lojda, Jakub Podivinsky, Zdenek Kotásek

Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks.

Jakub Podivinsky, Jakub Lojda, Richard Panek, Ondrej Cekan, Martin Krcma, Zdenek Kotásek

Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock.

Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek

Proceedings of the IEEE East-West Design & Test Symposium, 2020

Hardening of Smart Electronic Lock Software against Random and Deliberate Faults.

Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

Automatic Design of Reliable Systems Based on the Multiple-choice Knapsack Problem.

Jakub Lojda, Jakub Podivinsky, Ondrej Cekan, Richard Panek, Martin Krcma, Zdenek Kotásek

Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020

2019

Testing Reliability of Smart Electronic Locks: Analysis and the First Steps Towards.

Ondrej Cekan, Jakub Podivinsky, Jakub Lojda, Richard Panek, Martin Krcma, Zdenek Kotásek

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018

Partial Dynamic Reconfiguration in an FPGA-based Fault-Tolerant System: Simulation-based Evaluation.

Richard Panek, Jakub Lojda, Jakub Podivinsky, Zdenek Kotásek

Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

Input and Output Generation for the Verification of ALU: A Use Case.

Ondrej Cekan, Richard Panek, Zdenek Kotásek

Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant System Design Automation.

Jakub Lojda, Jakub Podivinsky, Ondrej Cekan, Richard Panek, Zdenek Kotásek

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017

Reliability Analysis and Improvement of FPGA-Based Robot Controller.

Jakub Podivinsky, Jakub Lojda, Ondrej Cekan, Richard Panek, Zdenek Kotásek

Proceedings of the Euromicro Conference on Digital System Design, 2017