Rishov Sarkar

Orcid: 0000-0002-9168-0392

According to our database1, Rishov Sarkar authored at least 16 papers between 2022 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
FlexGO: A Unified Overlay for General Graph Neural Network Acceleration.
Proceedings of the 27th International Symposium on Quality Electronic Design, 2026

From Acceleration to Accelerating Acceleration: Applications and Tools for Democratizing Hardware Design.
Proceedings of the 34th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2026

FIFOAdvisor: A DSE Framework for Automated FIFO Sizing of High-Level Synthesis Designs.
Proceedings of the 31st Asia and South Pacific Design Automation Conference, 2026

2025
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs.
Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

2024
HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond.
Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, 2024

LightningSimV2: Faster and Scalable Simulation for High-Level Synthesis via Graph Compilation and Optimization.
Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

Ph.D. Project: Modernizing High-Level Hardware Design Workflows.
Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

2023
Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-Level Sparsity via Mixture-of-Experts.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

INR-Arch: A Dataflow Architecture and Compiler for Arbitrary-Order Gradient Computations in Implicit Neural Representation Processing.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

FlowGNN: A Dataflow Architecture for Real-Time Workload-Agnostic Graph Neural Network Inference.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

From Acceleration to Accelerating Acceleration: Modernizing the Accelerator Landscape using High-Level Synthesis.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

LightningSim: Fast and Accurate Trace-Based Simulation for High-Level Synthesis.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022
M<sup>3</sup>ViT: Mixture-of-Experts Vision Transformer for Efficient Multi-task Learning with Model-Accelerator Co-design.
CoRR, 2022

FlowGNN: A Dataflow Architecture for Universal Graph Neural Network Inference via Multi-Queue Streaming.
CoRR, 2022

GenGNN: A Generic FPGA Framework for Graph Neural Network Acceleration.
CoRR, 2022

M³ViT: Mixture-of-Experts Vision Transformer for Efficient Multi-task Learning with Model-Accelerator Co-design.
Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022


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