Rizwan Asghar

According to our database1, Rizwan Asghar authored at least 11 papers between 2008 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Towards intelligent P2P IPTV overlay management through classification of peers.
Peer-to-Peer Netw. Appl., 2022

2012
Implementation of a Radix-4, Parallel Turbo Decoder and Enabling the Multi-Standard Support.
J. Signal Process. Syst., 2012

2010
Flexible Interleaving Sub-systems for FEC in Baseband Processors.
PhD thesis, 2010

Memory Conflict Analysis and Implementation of a Re-configurable Interleaver Architecture Supporting Unified Parallel Turbo Decoding.
J. Signal Process. Syst., 2010

Multimode Flex-Interleaver Core for Baseband Processor Platform.
J. Comput. Networks Commun., 2010

System Architecture for 3GPP-LTE Modem using a Programmable Baseband Processor.
Int. J. Embed. Real Time Commun. Syst., 2010

VLSI Implementation of a Fixed-Complexity Soft-Output MIMO Detector for High-Speed Wireless.
EURASIP J. Wirel. Commun. Netw., 2010

VLSI implementation of A multi-standard MIMO symbol detector for 3GPP LTE and WiMAX.
Proceedings of the 2010 Wireless Telecommunications Symposium, 2010

2009
Low Complexity Hardware Interleaver for MIMO-OFDM based Wireless LAN.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Memory Conflict Analysis and Interleaver Design for Parallel Turbo Decoding Supporting HSPA Evolution.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008
Dual standard re-configurable hardware interleaver for turbo decoding.
Proceedings of the Third International Symposium on Wireless Pervasive Computing, 2008


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