Roberto M. Negrini

According to our database1, Roberto M. Negrini authored at least 10 papers between 1977 and 1996.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

1996
A chip-set for the Generalized Hough Transform.
J. VLSI Signal Process., 1996

1992
Fault tolerance in FFT arrays: Time redundancy approaches.
J. VLSI Signal Process., 1992

1991
The PAPIA system.
J. VLSI Signal Process., 1991

1989
Fault-tolerance through reconfiguration of VLSI and WSI awards.
MIT Press series in computer systems, MIT Press, ISBN: 978-0-262-14044-7, 1989

1988
Microelectronics: Fault tolerance and reliability.
Microprocess. Microprogramming, 1988

1987
Systolic arrays for serial signal processing.
Microprocessing and Microprogramming, 1987

1986
An approach to fault-tolerance in architectures for discrete fourier transforms.
Microprocessing and Microprogramming, 1986

Fault Tolerance Fechniques for Array Structures Used in Supercomputing.
Computer, 1986

1983
Some Properties Derived from Structural Analysis of Program Graph Models.
IEEE Trans. Software Eng., 1983

1977
Some implementations at the microcomputer laboratory of politecnico di Milano.
Euromicro Newsletter, 1977


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