Rodrigo Jaramillo-Ramirez

According to our database, Rodrigo Jaramillo-Ramirez authored at least 4 papers between 2007 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

On the Feasibility of Implementing a Four-Quadrant CMOS Analog Multiplier Using Only Digital Inverter Standard-Cells as Building Blocks.

Gregorio Zamora-Mejía, Victor Hugo Carbajal-Gomez, Alejandro Silva-Juárez, Luis C. Álvarez-Simón, Alejandro Díaz-Sánchez, Sergio A. Rosales-Nunez, Julio Hernández-Pérez, Rodrigo Jaramillo-Ramirez, Ernesto Conde-Almada, Alejandro I. Bautista-Castillo, José Miguel Rocha-Pérez

IEEE Access, 2026

2018

A resource efficient symbol synchronizer implementation for the IEEE 802.11 protocol.

L. Orozco-Galvan, Ramón Parra-Michel, Fernando Peña-Campos, Rodrigo Jaramillo-Ramirez, Eduardo Romero-Aguirre

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

2008

Variability-aware design of subthreshold devices.

Rodrigo Jaramillo-Ramirez, Javid Jaffari, Mohab Anis

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

A Dual-Threshold FPGA Routing Design for Subthreshold Leakage Reduction.

Rodrigo Jaramillo-Ramirez, Mohab Anis

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007