Eduardo Romero-Aguirre

According to our database1, Eduardo Romero-Aguirre authored at least 10 papers between 2005 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
A resource efficient symbol synchronizer implementation for the IEEE 802.11 protocol.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

2016
Iterative MIMO Detection and Channel Estimation Using Joint Superimposed and Pilot-Aided Training.
Mob. Inf. Syst., 2016

2015
Reconfigurable architecture based on FPGA for OFDM transmitter.
Proceedings of the 7th IEEE Latin-American Conference on Communications, 2015

2013
Full-Hardware Architectures for Data-Dependent Superimposed Training Channel Estimation.
J. Signal Process. Syst., 2013

A SDR architecture based on FPGA for multi-standard transmitter.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

2012
Configurable Transmitter and Systolic Channel Estimator Architectures for Data-Dependent Superimposed Training Communications Systems.
Int. J. Reconfigurable Comput., 2012

2011
Full-hardware architectures for data-dependent superimposed training channel estimation.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Architecture Based on Array Processors for Data-Dependent Superimposed Training Channel Estimation.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

2010
A Hardware-Efficient Frequency Domain Correlator Architecture for Acquisition Stage in GPS.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

2005
A Survey of the Graphic Alternate Method for Boolean Functions Simplification.
Proceedings of the 15th International Conference on Electronics, Communications, and Computers (CONIELECOMP 2005), 28 February 2005, 2005


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