Roland N. Ibbett

According to our database1, Roland N. Ibbett authored at least 32 papers between 1972 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
The Atlas milestone.
Commun. ACM, 2022

2010
Specification-based Verification in a Distributed Shared Memory Simulation Model.
Simul., 2010

Gasimo: a global address space simulation model.
Proceedings of the 3rd International Conference on Simulation Tools and Techniques, 2010

2009
DSiMCluster: A Simulation Model for Efficient Memory Analysis Experiments of DSM Clusters.
Simul., 2009

2006
Computer architecture simulation models.
Proceedings of the 11th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2006

2005
Grand Challenges in Computing: Education - A Summary.
Comput. J., 2005

2004
A simulation applet for microcoding exercises.
Proceedings of the 2004 workshop on Computer architecture education, 2004

2003
Simulation of a computer architecture for quantum chromodynamics calculations.
ACM Crossroads, 2003

2002
WWW visualisation of computer architecture simulations.
Proceedings of the 7th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2002

2000
HASE DLX Simulation Model.
IEEE Micro, 2000

1999
Computer architecture visualisation techniques.
Microprocess. Microsystems, 1999

The University of Manchester MU5 Project.
IEEE Ann. Hist. Comput., 1999

1998
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment.
ACM Trans. Model. Comput. Simul., 1998

1997
An integrated learning support environment for computer architecture.
Proceedings of the 1997 workshop on Computer architecture education, 1997

1996
An interactive environment for the teaching of computer architecture.
Proceedings of the 1st Annual Conference on Integrating Technology into Computer Science Education, 1996

1995
HASE: A Flexible Toolset for Computer Architects.
Comput. J., 1995

1994
Hierarchical Architecture Design and Simulation Environment.
Proceedings of the MASCOTS '94, Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems, January 31, 1994

HASE: A Flexible High Performance Architecture Simulator.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

1993
Parallelism versus Performance - Matching Parallel Hardware to Software.
Proceedings of the Parallel Computing: Trends and Applications, 1993

1992
Xbar: A VLSI Circuit for Bit-sliced Packet Switching Networks.
Proceedings of the Algorithms, Software, Architecture, 1992

1991
Simulation of the MC88000 Microprocessor System on a Transputer Network.
Proceedings of the Distributed Memory Computing, 2nd European Conference, 1991

1989
Architectural Mechanisms to Support Sparse Vector Processing.
Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989

1988
On the design and performance of conventional pipelined architectures.
J. Supercomput., 1988

Context flow: An alternative to conventional pipelined architectures.
J. Supercomput., 1988

1985
Centrenet - A High Performance Local Area Network.
Comput. J., 1985

MU6V: A Parallel Vector Processing System.
Proceedings of the 12th Annual Symposium on Computer Architecture, 1985

1980
An Analysis of Instruction-Fetching Strategies in Pipelined Computers.
IEEE Trans. Computers, 1980

1978
The Development of the MU5 Computer System.
Commun. ACM, 1978

1977
The MU5 Name Store.
Comput. J., 1977

Performance Measurements of the MU5 Primary Instruction Pipeline.
Proceedings of the Information Processing, 1977

1975
Array operations in MU5.
Proceedings of the Conference on Programming Languages and Compilers for Parallel and Vector Machines 1975, 1975

1972
The MU5 instruction pipeline.
Comput. J., 1972


  Loading...