Ryan Jurasek

According to our database¹, Ryan Jurasek authored at least 3 papers between 2018 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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Bibliography

2024

Co-design of a novel CMOS highly parallel, low-power, multi-chip neural network accelerator.

[BibT_eX]

[DOI]

CoRR, 2024

2020

Verification and Testing Considerations of an In-Memory AI Chip.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE North Atlantic Test Workshop, 2020

2018

An analysis of an inexpensive memory test solution.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE North Atlantic Test Workshop, 2018

Ryan Jurasek

Timeline

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Bibliography

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