Ryoji Shiota

According to our database, Ryoji Shiota authored at least 6 papers in 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

Study of multistage digital oscilloscope trigger circuit.

Shotaro Sakurai, Seiya Takigami, Takashi Ida, Yuki Ozawa, Nobukazu Tsukiji, Yasunori Kobori, Haruo Kobayashi, Ryoji Shiota

Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

SAR TDC architecture for one-shot timing measurement with full digital implementation.

Yuki Ozawa, Takashi Ida, Shotaro Sakurai, Richen Jiang, Rino Takahashi, Haruo Kobayashi, Ryoji Shiota

Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Study of jitter generators for high-speed I/O interface jitter tolerance testing.

Yuki Ozawa, Takuya Arafune, Nobukazu Tsukiji, Haruo Kobayashi, Ryoji Shiota

Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Gray-code input DAC architecture for clean signal generation.

Richen Jiang, Gopal Adhikari, Yifei Sun, Dan Yao, Rino Takahashi, Yuki Ozawa, Nobukazu Tsukiji, Haruo Kobayashi, Ryoji Shiota

Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Architecture of high performance successive approximation time digitizer.

Takashi Ida, Yuki Ozawa, Jiang Richen, Shotaro Sakurai, Seiya Takigami, Nobukazu Tsukiji, Hirotaka Arai, Ryoji Shiota, Haruo Kobayashi

Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

SAR TDC Architecture with Self-Calibration Employing Trigger Circuit.

Yuki Ozawa, Takashi Ida, Richen Jiang, Shotaro Sakurai, Seiya Takigami, Nobukazu Tsukiji, Ryoji Shiota, Haruo Kobayashi

Proceedings of the 26th IEEE Asian Test Symposium, 2017