Nobukazu Tsukiji

According to our database1, Nobukazu Tsukiji authored at least 22 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
Operation and Stability Analysis of Temperature-Insensitive MOS Reference Current Source with Self-Bias Circuit.
Proceedings of the International SoC Design Conference, 2020

2018
A Study on Loop Gain Measurement Method Using Output Impedance in DC-DC Buck Converter.
IEICE Trans. Commun., 2018

2017
DAC linearity improvement with layout technique using magic and latin squares.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Two-phase soft-switching DC-DC converter with voltage-mode resonant switch.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Constant on-time controlled four-phase buck converter via two ways of saw-tooth-wave circuit and PLL circuit.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Equivalence between Nyquist and Routh-Hurwitz stability criteria for operational amplifier design.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Estimation of circuit component values in buck converter using efficiency curve.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Study of multistage digital oscilloscope trigger circuit.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Study of jitter generators for high-speed I/O interface jitter tolerance testing.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

EMI reduction technique with noise spread spectrum using swept frequency modulation for hysteretic DC-DC converters.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Noise spread spectrum with adjustable notch frequency in complex pulse coding controlled DC-DC converters.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Gray-code input DAC architecture for clean signal generation.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Architecture of high performance successive approximation time digitizer.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

Delay-time suppression technique for DC/DC buck converter using voltage mode PWM control.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

SAR TDC Architecture with Self-Calibration Employing Trigger Circuit.
Proceedings of the 26th IEEE Asian Test Symposium, 2017

Fundamental design tradeoff and performance limitation of electronic circuits based on uncertainty relationships.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015
Transient Response Improvement of DC-DC Buck Converter by a Slope Adjustable Triangular Wave Generator.
IEICE Trans. Commun., 2015

A study on HCI induced gate leakage current model used for reliability simulations in 90nm n-MOSFETs.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

High efficiency single-inductor dual-output DC-DC converter with ZVS-PWM control.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

EMI reduction by analog noise spread spectrum in new ripple controlled converter.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

Selectable notch frequencies of EMI spread spectrum using pulse modulation in switching converter.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

Study on maximum electric field modeling used for HCI induced degradation characteristic of LDMOS transistors.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015


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