Ryoma Iimura

According to our database, Ryoma Iimura authored at least 4 papers between 2019 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

Annealing Processing Architecture of 28-nm CMOS Chip for Ising Model With 512 Fully Connected Spins.

Ryoma Iimura, Satoshi Kitamura, Takayuki Kawahara

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

FPGA Implementation of Support Vector Machine Using Ising Model for AI on Things.

Yudai Taguchi, Ryoma Iimura, Takayuki Kawahara

Proceedings of the IEEE International Conference on Computational Intelligence and Virtual Environments for Measurement Systems and Applications, 2021

2020

Implementation of Multi Spin-Thread Architecture to Fully-Connected Annealing Processing AI Chips.

Ryoma Iimura, Satoshi Kitamura, Takayuki Kawahara

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019

High-speed Sparse Ising Model on FPGA.

Akira Minamisawa, Ryoma Iimura, Takayuki Kawahara

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019