S. Athanasiou

According to our database, S. Athanasiou authored at least 2 papers between 2015 and 2016.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2016

Preliminary results on TFET - Gated diode in thin silicon film for IO design & ESD protection in 28nm UTBB FD-SOI CMOS technology.

Philippe Galy, S. Athanasiou

Proceedings of the International Conference on IC Design and Technology, 2016

2015

Preliminary 3D TCAD electro-thermal simulations of BIMOS transistor in thin silicon film for ESD protection in FDSOI UTBB CMOS technology.

S. Athanasiou, Sorin Cristoloveanu, Philippe Galy

Proceedings of the 2015 International Conference on IC Design & Technology, 2015