S. C. Leung

According to our database1, S. C. Leung authored at least 8 papers between 1987 and 1997.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

1997
Space division approach to implement a shared buffer in an ATM switch.
Comput. Commun., 1997

1995
On the realizability and synthesis of delay-insensitive behaviors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Sharing Buffer in an Input-Output Buffered ATM Switch without Scaling up Memory Bandwidth Requirement.
Proceedings of the 4th International Conference on Computer Communications and Networks (ICCCN '95), 1995

1994
A syntax-directed translation for the synthesis of delay-insensitive circuits.
IEEE Trans. Very Large Scale Integr. Syst., 1994

Optimization of state encoding in distributed circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

An efficient algorithm for the realizability analysis of signal transition graphs.
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994

1991
Synthesis of Delay-Insensitive Circuits by Refinements into Atomic Threads.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1987
A second generation Silicon compiler for bit-serial signal processing architecture.
Proceedings of the IEEE International Conference on Acoustics, 1987


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