S. K. Pandiyan

According to our database, S. K. Pandiyan authored at least 2 papers between 2021 and 2023.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of four.

2023

Design of Low-Power 10-Transistor Full Adder Using GDI Technique for Energy-Efficient Arithmetic Applications.

T. Nirmalraj, S. K. Pandiyan, Rakesh Kumar Karan, R. Sivaraman, Rengarajan Amirtharajan

Circuits Syst. Signal Process., June, 2023

2021

Automatic diagnosis of single fault in interconnect testing of SRAM-based FPGA.

T. Nirmalraj, S. Radhakrishnan, S. K. Pandiyan

IET Comput. Digit. Tech., 2021