S. Ramanathan

According to our database, S. Ramanathan authored at least 13 papers between 1990 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

Need aspect approval system for procurement of components used for INDIAN satellite program.

Jagadamaba Prasad Singh, S. M. Kattimani, Rakesh Kumar, S. Ramanathan, G. N. V. Prasad

Proceedings of the 2018 4th International Conference on Recent Advances in Information Technology (RAIT), 2018

2000

Reconfigurable Filter Coprocessor Architecture for DSP Applications.

S. Ramanathan, S. K. Nandy, V. Visvanathan

J. VLSI Signal Process., 2000

1999

Architectural Synthesis of Computational Engines for Subband Adaptive Filtering.

S. Ramanathan, V. Visvanathan, S. K. Nandy

J. VLSI Signal Process., 1999

A computational engine for multirate FIR digital filtering.

S. Ramanathan, V. Visvanathan, S. K. Nandy

Signal Process., 1999

Synthesis of ASIPs for DSP algorithms.

S. Ramanathan, V. Visvanathan, S. K. Nandy

Integr., 1999

Low-power pipelined LMS adaptive filter architectures with minimal adaptation delay1.

S. Ramanathan, V. Visvanathan

Integr., 1999

Synthesis of Configurable Architectures for DSP Algorithms.

S. Ramanathan, V. Visvanathan, S. K. Nandy

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1997

Low-Power Configurable Processor Array for DLMS Adaptive Filtering.

S. Ramanathan, V. Visvanathan

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

1996

A systolic architecture for LMS adaptive filtering with minimal adaptation delay.

S. Ramanathan, V. Visvanathan

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

1995

A modular systolic architecture for delayed least mean squares adaptive filtering.

V. Visvanathan, S. Ramanathan

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

1993

An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters.

V. Visvanathan, Nibedita Mohanty, S. Ramanathan

Proceedings of the Sixth International Conference on VLSI Design, 1993

A Methodology for Generating Application Specific Tree Multipliers.

S. Ramanathan, Nibedita Mohanty, V. Visvanathan

Proceedings of the Sixth International Conference on VLSI Design, 1993

1990

Rewrite Systems for Protocol Specification and Verification.

S. Ramanathan, G. Sivakumar

Proceedings of the Formal Description Techniques, 1990