Saleh Usman

Orcid: 0000-0001-8257-0768

According to our database1, Saleh Usman authored at least 6 papers between 2012 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Fast-Converging and Low-Power LDPC Decoding: Algorithm, Architecture, and VLSI Implementation.
J. Signal Process. Syst., 2021

Fast Column Message-Passing Decoding of Low-Density Parity-Check Codes.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
An Optimized VLSI Implementation of an IEEE 802.11n/ac/ax LDPC Decoder.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2017
A Multi-Gbps Fully Pipelined Layered Decoder for IEEE 802.11n/ac/ax LDPC Codes.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

2016
Interlaced Column-Row Message-Passing Schedule for Decoding LDPC Codes.
Proceedings of the 2016 IEEE Global Communications Conference, 2016

2012
Porting of OSSIE on Texas Instrument's DAVINCI SoC Based SDR Platform.
Proceedings of the 2012 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery, 2012


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