Sameer D. Sahasrabuddhe

Affiliations:
  • AMD, Bengaluru, India
  • NVIDIA, Pune, India (former)
  • Indian Institute of Technology Bombay, Mumbai, India (former, PhD 2009)


According to our database1, Sameer D. Sahasrabuddhe authored at least 3 papers between 2007 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2019
A Formal Analysis of the NVIDIA PTX Memory Consistency Model.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2010
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2007
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007


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