Sami A. Al-Arian

According to our database1, Sami A. Al-Arian authored at least 17 papers between 1984 and 2000.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2000
Partitioning algorithm to enhance pseudoexhaustive testing of digital VLSI circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2000

Partitioning sequential circuits for pseudoexhaustive testing.
IEEE Trans. Very Large Scale Integr. Syst., 2000

1999
Pseudo-Exhaustive Testing of Sequential Circuits.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

1998
Partitioning algorithm to enhance VLSI testability.
Proceedings of the 36th Annual ACM Southeast Regional Conference, 1998

1997
A New Heuristic Algorithm for Estimating Signal and Detection Probabilities.
Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997

1996
A novel built-in current sensor for I<sub>DDQ</sub> testing of deep submicron CMOS ICs.
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

1994
Reconfigurable Linear Feedback Register Design, Analysis & Applications.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Improving the Testability of VLSI Circuits through Partitioning.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
A Method for Consistent Fault Coverage Reporting.
IEEE Des. Test Comput., 1993

Degrading fault model for WSI interconnection lines.
Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

1992
Fault Simulation and Test Generation by Fault Sampling Techniques.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1991
A Unique Approach to Built-in-Self-Test Circuit Design.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1990
Self-testing and self-reconfiguration architecture for 2-D WSI arrays.
Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, 1990

Three approaches to design fault tolerant programmable logic arrays.
Proceedings of the 28th Annual Southeast Regional Conference, 1990

1989
Design and Test in the Universities.
Proceedings of the Proceedings International Test Conference 1989, 1989

1988
Defining a Standard for Fault Simulator Evaluation.
Proceedings of the Proceedings International Test Conference 1988, 1988

1984
Comprehensive Fault Model and Testing of CMOS Circuits.
Proceedings of the Proceedings International Test Conference 1984, 1984


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