Sanjay Talreja

According to our database, Sanjay Talreja authored at least 2 papers between 2000 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

A 50nm 8Gb NAND Flash Memory with 100MB/s Program Throughput and 200MB/s DDR Interface.

Dean Nobunaga, Ebrahim Abedifard, Frankie Roohparvar, June Lee, Erwin Yu, Allahyar Vahidimowlavi, Michael Abraham, Sanjay Talreja, Rajesh Sundaram, Rod Rozman, Luyen Vu, Chih-Liang Chen, Uday Chandrasekhar, Rupinder Bains, Vimon Viajedor, William Mak, Munseork Choi, Darshak Udeshi, Michelle Luo, Shahid Qureshi, Jeffrey Tsai, Frederick Jaffin, Yujiang Liu, Marco Mancinelli

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2000

A Multilevel-Cell 32MB Flash Memory.

M. Bauer, R. Alexis, Greg Atwood, B. Baltar, Al Fazio, K. Frary, M. Hensel, M. Ishac, Johnny Javanifard, M. Landgraf, D. Leak, Kim Loe, Duane Mills, P. Ruby, Rod Rozman, S. Sweha, Sanjay Talreja, K. Wojciechowski

Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000