Sarvesh Prabhu

According to our database1, Sarvesh Prabhu authored at least 7 papers between 2011 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
Information-theoretic and statistical methods of failure log selection for improved diagnosis.
Proceedings of the 2015 IEEE International Test Conference, 2015

2014
A diagnosis-friendly LBIST architecture with property checking.
Proceedings of the 2014 International Test Conference, 2014

Property-checking based LBIST for improved diagnosability.
Proceedings of the 19th IEEE European Test Symposium, 2014

2013
Test generation for circuits with embedded memories using SMT.
Proceedings of the 18th IEEE European Test Symposium, 2013

2012
A SMT-based diagnostic test generation method for combinational circuits.
Proceedings of the 30th IEEE VLSI Test Symposium, 2012

A Novel SMT-Based Technique for LFSR Reseeding.
Proceedings of the 25th International Conference on VLSI Design, 2012

2011
An Efficient 2-Phase Strategy to Achieve High Branch Coverage.
Proceedings of the 20th IEEE Asian Test Symposium, 2011


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