Satoshi Awamura

According to our database, Satoshi Awamura authored at least 4 papers in 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

4T2R X-ReRAM CiM Array for Variation-tolerant, Low-power, Massively Parallel MAC Operation.

Fuyuki Kihara, Seiji Uenohara, Satoshi Awamura, Naoko Misawa, Chihiro Matsui, Ken Takeuchi

CoRR, July, 2025

CuLD: Current-Limiting Differential Reading Circuit for Current-Based Compute-in-Memory.

Seiji Uenohara, Satoshi Awamura, Norio Hattori

CoRR, February, 2025

Conductance Variation-Assisted Adversarial Attack Robustness on 40nm TaOx-based ReRAM CiM.

Kenshin Yamauchi, Naoko Misawa, Satoshi Awamura, Masahiro Morimoto, Chihiro Matsui, Ken Takeuchi

Proceedings of the IEEE International Reliability Physics Symposium, 2025

Bayesian Neural Network Realization by Random Telegraph Noise in 40nm TaOX ReRAM CiM.

Junnosuke Furukawa, Koki Shibata, Kenshin Yamauchi, Naoko Misawa, Satoshi Awamura, Chihiro Matsui, Ken Takeuchi

Proceedings of the IEEE International Memory Workshop, 2025