Naoko Misawa

According to our database, Naoko Misawa authored at least 9 papers between 2021 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2023

Write Variation & Reliability Error Compensation by Layer-Wise Tunable Retraining of Edge FeFET LM-GA CiM.

Shinsei Yoshikiyo, Naoko Misawa, Kasidit Toprasertpong, Shinichi Takagi, Chihiro Matsui, Ken Takeuchi

IEICE Trans. Electron., July, 2023

ReRAM CiM Fluctuation Pattern Classification by CNN Trained on Artificially Created Dataset.

Ayumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi

Proceedings of the IEEE International Reliability Physics Symposium, 2023

Stochastic Computing-based Computation-in-Memory (SC CiM) Architecture for DNNs and Hierarchical Evaluations of Non-volatile Memory Error and Defect Tolerance.

Takuto Nishimura, Yuya Ichikawa, Akira Goda, Naoko Misawa, Chihiro Matsui, Ken Takeuchi

Proceedings of the IEEE International Memory Workshop, 2023

LIORAT: NN Layer I/O Range Training for Area/Energy-Efficient Low-Bit A/D Conversion System Design in Error-Tolerant Computation-in-Memory.

Ayumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022

Antithetic effect of interferon-α on cell-free and cell-to-cell HIV-1 infection.

Ryuichi Kumata, Shoya Iwanami, Katrina B. Mar, Yusuke Kakizoe, Naoko Misawa, Shinji Nakaoka, Yoshio Koyanagi, Alan S. Perelson, John W. Schoggins, Shingo Iwami, Kei Sato

PLoS Comput. Biol., 2022

Edge Computation-in-Memory for In-situ Class-incremental Learning with Knowledge Distillation.

Shinsei Yoshikiyo, Naoko Misawa, Chihiro Matsui, Ken Takeuchi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing.

Naoko Misawa, Kenta Taoka, Chihiro Matsui, Ken Takeuchi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Edge Retraining of FeFET LM-GA CiM for Write Variation & Reliability Error Compensation.

Shinsei Yoshikiyo, Naoko Misawa, Kasidit Toprasertpong, Shinichi Takagi, Chihiro Matsui, Ken Takeuchi

Proceedings of the IEEE International Memory Workshop, 2022

2021

Simulated Annealing Algorithm & ReRAM Device Co-optimization for Computation-in-Memory.

Kenta Taoka, Naoko Misawa, Shunsuke Koshino, Chihiro Matsui, Ken Takeuchi

Proceedings of the IEEE International Memory Workshop, 2021